A parallel discrete event simulation framework.


A parallel SSH-based remote machine management system.


An easy-to-use python package for parallel task execution.


A flit-level interconnection network simulator.


A project development find and goto system.


We present two practical and efficient incremental adaptive routing algorithms for HyperX.

We present SuperSim, an open-source flit-level interconnection network simulator for large-scale high-performance networks.

This dissertation presents Sikker, a highly-scalable high-performance distributed system architecture for secure service-oriented …



Senior Research Scientist


Feb 2021 – Present Salt Lake City, Utah
I work in the network research group at Nvidia Research.

Senior Software Engineer


Jan 2019 – Jan 2021 Sunnyvale, California
I worked in the system infrastructure team specifically on tightly-coupled high-performance network technologies covering topologies, routing algorithms, network acceleration and offloading, congestion control, processing architectures, and more.

Research Scientist

Hewlett Packard Labs

Jan 2016 – Dec 2018 Fort Collins, Colorado
I was a lead architect on design of a new high-performance network designed for large-scale high-performance computing (HPC) systems and massively parallel memory-driven computing (MDC) systems. I was the key designer of the Gen-Z routing architectural specification. Using a data-driven simulation approach I guided the design of a novel multi-chip module (MCM) switch architecture that utilizes co-packaged integrated photonics.

Digital Hardware Design Engineer

L3 Communications

Aug 2008 – Sep 2012 Salt Lake City, Utah
Developed digital processing architectures for encryption, networking, and waveform data processing. Designed systems with strict requirements for high-performance, low-power, and low-area. All designs were meticulously scrutinized for high-reliability and signal integrity.


  • Sunnyvale, California, USA