Nic McDonald
Portrait of Nic McDonald

Nic McDonald

Software and Hardware Engineer

NVIDIA

Biography

I am a computer architecture research scientist and software/hardware engineer. I am a senior research scientist at NVIDIA Research working on next generation hardware and software systems for NVIDIA networks.

Interests

  • Computer Architecture
  • Software Engineering
  • Interconnection Networks
  • High Performance Computing
  • Simulation and Modeling
  • Embedded Systems
  • Artificial Intelligence
  • Algorithmic Trading

Education

  • Ph.D. in Electrical Engineering, 2016

    Stanford University

  • M.S. in Electrical Engineering, 2012

    University of Utah

  • B.S. in Computer Engineering, 2010

    University of Utah

Projects

Publications

Cite

@inproceedings{isaev2023calculon,
  title={{Calculon: a Methodology and Tool for High-Level Codesign of Systems and Large Language Models}},
  author={Isaev, Mikhail and McDonald, Nic and Dennison, Larry and Vuduc, Richard},
  booktitle={Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis (SC)},
  year={2023},
  organization={ACM}
}
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@inproceedings{isaev2023scaling,
  title={{Scaling Infrastructure to Support Multi-Trillion Parameter LLM Training}},
  author={Isaev, Mikhail and McDonald, Nic and Vuduc, Richard},
  booktitle={Proceedings of the Workshop on Architecture and System Support for Transformer Models (ASSYST)},
  year={2023}
}
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@inproceedings{isaev2022paragraph,
  title={{ParaGraph: An application-simulator interface and toolkit for hardware-software co-design}},
  author={Isaev, Mikhail and McDonald, Nic and Young, Jeffrey and Vuduc, Richard},
  booktitle={51st International Conference on Parallel Processing (ICPP)},
  year={2022},
  organization={ACM}
}
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@inproceedings{mcdonald2019hxrouting,
  title={{Practical and Efficient Incremental Adaptive Routing for HyperX Networks}},
  author={McDonald, Nic and Isaev, Mikhail and Flores, Adriana and Davis, Al and Kim, John},
  booktitle={Proceedings of the Conference on High Performance Computing Network, Storage and Analysis (SC)},
  year={2019},
  organization={ACM}
}
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@inproceedings{domke2019hyperx,
  title={{HyperX Topology: First At-Scale Implementation and Comparison to the Fat-Tree}},
  author={Domke, Jens and Matsuoka, Satoshi and Ivanov, Ivan R. and Tsushima, Yuki and Yuki, Tomoya and Nomura, Akihiro and Miura, Shin'ichi and McDonald, Nic and Floyd, Dennis L. and Dubé, Nicolas},
  booktitle={Proceedings of the Conference on High Performance Computing Network, Storage and Analysis (SC)},
  year={2019},
  organization={ACM}
}
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@inproceedings{mcdonald2018supersim,
  title={{SuperSim: Extensible Flit-Level Simulation of Large-Scale Interconnection Networks}},
  author={McDonald, Nic and Flores, Adriana and Davis, Al and Isaev, Mikhail and Kim, John and Gibson, Doug},
  booktitle={International Symposium on Performance Analysis of Systems and Software (ISPASS)},
  year={2018},
  organization={IEEE}
}
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Cite

@phdthesis{mcdonald2016hpsoc,
  title={{High-Performance Service-Oriented Computing}},
  author={McDonald, Nicholas},
  year={2016},
  school={Stanford University}
}
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Experience

  • Feb 2021 – Present

    Senior Research Scientist

    NVIDIA
    Salt Lake City, Utah

    At NVIDIA Research, I work on AI system architecture. I study how accelerator design, memory hierarchy, and interconnect shape the performance and efficiency of modern language-model workloads. I build models and simulation tools to explore hardware/software trade-offs, evaluate new inference system designs, and investigate architectures for agentic AI and small language models. My work sits at the intersection of computer architecture, networking, and machine learning systems, with a focus on turning research ideas into practical directions for future AI platforms.

  • Jan 2019 – Jan 2021

    Senior Software Engineer

    Google
    Sunnyvale, California

    I worked in the system infrastructure team specifically on tightly-coupled high-performance network technologies covering topologies, routing algorithms, network acceleration and offloading, congestion control, processing architectures, and more.

  • Jan 2016 – Dec 2018

    Research Scientist

    Hewlett Packard Labs
    Fort Collins, Colorado

    I was a lead architect on design of a new high-performance network designed for large-scale high-performance computing (HPC) systems and massively parallel memory-driven computing (MDC) systems. I was the key designer of the Gen-Z routing architectural specification. Using a data-driven simulation approach I guided the design of a novel multi-chip module (MCM) switch architecture that utilizes co-packaged integrated photonics.

  • Aug 2008 – Sep 2012

    Digital Hardware Design Engineer

    L3 Communications
    Salt Lake City, Utah

    Developed digital processing architectures for encryption, networking, and waveform data processing. Designed systems with strict requirements for high-performance, low-power, and low-area. All designs were meticulously scrutinized for high-reliability and signal integrity.

Patents

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